System for supporting communications among ATM devices, device for supporting data transmission, method for sending data, and computer program product

ABSTRACT

A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a system and a method for supportingcommunications among plural ATM devices.

2. Description of the Prior Art

FIG. 23 shows a conventional method for connecting ATM devices 5. Adevice such as an ATM terminal or an ATM exchange having an ATM(Asynchronous Transfer Mode) interface (hereinafter referred to as an“ATM device 5”) performs communication with other ATM devices 5 via anATM network as shown in FIG. 23. The ATM network enables a fastcommunication of multimedia data or the like. Therefore, a service forconnecting ATM devices 5 to each other via the ATM network so as toestablish a WAN (Wide Area Network) or the like is widespread.

However, a cost necessary for constructing and managing the ATM networkis high, so a method for establishing a WAN at a lower cost is desiredstrongly.

On the other hand, as a method for establishing and operating a WAN, amethod of connecting devices using a wide area Ethernet network hasgained the spotlight. According to this method, a WAN can be establishedat a low cost.

Therefore, a method of replacing the existing ATM network for connectingATM devices 5 with a wide area Ethernet network is possible. However, insuch a method, it is difficult to predict a delay or a degree of dumpingof frames in the wide area Ethernet network. Therefore, it is difficultto synchronize a clock of a lower order ATM device 5 with a clock of ahigher order ATM device 5 of communication in the wide area Ethernetnetwork. Accordingly, communication between ATM devices 5 cannot beperformed well in the above-mentioned method.

As described in Japanese unexamined patent publication No. 7-264207,there is proposed a method of connecting a terminal device that is usedin an Ethernet LAN (Local Area Network) environment to an ATM exchangesimply. However, there is not proposed a method in which a wide areaEthernet network is used instead of the ATM network for communicationbetween ATM devices 5.

SUMMARY OF THE INVENTION

An object of the present invention is to realize communications betweenATM devices via a wide area Ethernet network.

A data transmission support device according to the present invention isa device for sending data from a first ATM device to a second ATM deviceby an ATM cell. The device includes a data frame reception portion forreceiving a data frame that is an Ethernet frame including an ATM cellfrom another device via Ethernet, the other device being connected tothe first ATM device, a control frame reception portion for receiving acontrol frame via the Ethernet, the control frame being sent by theother device at a predetermined time interval in accordance with atransmission side clock frequency that is a clock frequency forcommunication of the first ATM device, a clock reproducing portion forreproducing a clock having the same frequency as the transmission sideclock frequency in accordance with the time interval of receiving thecontrol frames, a clock transfer portion for transferring the reproducedclock to the second ATM device via an ATM interface, a conversionportion for converting the received data frame into an ATM cell, and anATM cell transmission portion for sending the ATM cell converted by theconversion portion to the second ATM device via the ATM interface.

In the present invention, an “ATM device” means a device such as an ATMterminal or an ATM exchange having an ATM (Asynchronous Transfer Mode)interface.

According to the present invention, data transmission from one ATMdevice to another ATM device can be performed by using a wide areaEthernet instead of an ATM network.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 shows an example of connecting two ATM devices by an ATM deviceconnection system according to the present invention.

FIG. 2 shows an example of a structure of a communication device.

FIG. 3 shows an example of a structure of a first communication devicefor realizing a function about clock synchronization.

FIG. 4 shows an example of a structure of a second communication devicefor realizing a function about clock synchronization.

FIG. 5 shows timings for selecting an ATM cell and an empty cell.

FIGS. 6( a)-6(c) show examples of formats of a synchronization frame anda data frame.

FIG. 7 shows an example of a method for calculating a first average timeat an initial stage.

FIG. 8 shows an example of a method for calculating the first averagetime after performing the calculation a predetermined number of times.

FIG. 9 shows an example of a variation of an accumulated value in adifferential counter.

FIG. 10 shows an example of a method for calculating a second averagetime.

FIG. 11 shows an example of a variation of an accumulated value in adifferential counter.

FIGS. 12( a)-12(d) show examples of a method for adjusting phases ofclocks.

FIGS. 13( a) and 13(b) show an example of a method for interpolation ofdata frames.

FIG. 14 shows an example of a structure of a second communication devicefor realizing a buffer control function.

FIG. 15 shows an example of a communication function of an OAM cell.

FIG. 16 shows an example of a structure of a second communication devicefor realizing an ATM shaping function.

FIG. 17 shows an example of a structure of a first communication devicefor realizing a setting function of VLAN-TAG priority information inaccordance with a CLP value.

FIG. 18 shows an example of a method for sending data from a firstcommunication device to plural second communication devices.

FIG. 19 shows an example of a structure of a communication device forrealizing a VPI reassigning function.

FIG. 20 is a flowchart showing an example of a flow of a general processof the first communication device.

FIG. 21 is a flowchart showing an example of a flow of a general processof the second communication device.

FIG. 22 is a flowchart showing an example of a flow of a VCXO controlprocess.

FIG. 23 shows a conventional method for connecting ATM devices.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Hereinafter, the present invention will be explained more in detail withreference to embodiments and drawings.

FIG. 1 shows an example of connecting two ATM devices 5 by an ATM deviceconnection system 3 according to the present invention, and FIG. 2 showsan example of a structure of a communication device 1.

In FIG. 1, the ATM device 5 is a device such as an ATM terminal or anATM exchange having an ATM interface. The ATM device 5 sends an ATM cellto other ATM device 5 or receives the ATM cell from other ATM device 5via an ATM network 9, so as to perform data communication.

The ATM device connection system 3 according to the present inventionincludes two communication devices 1. The communication devices 1 areconnected to each other via a wide area Ethernet 4 and perform datacommunication by sending and receiving frames. One of the communicationdevices 1 is connected to one of two ATM devices 5, while the othercommunication device 1 is connected to the other ATM device 5.

In addition, the communication device 1 has functions including afunction for converting the ATM cell to an Ethernet frame (hereinafterreferred to as a “frame” simply), a function for converting the Ethernetframe to the ATM cell, and a function for synchronizing a clock for datacommunication of one of the communication devices 1 with a clock fordata communication of the other communication device 1. By thesestructures, the ATM device connection system 3 can perform datacommunication between two ATM devices 5 via the wide area Ethernet 4instead of the conventional ATM network 9.

As the wide area Ethernet 4, Ethernet network such as Gigabit Ethernetor Fast Ethernet can be used. It is possible to use a general purposewide area Ethernet network. A full-duplex communication can be performedin the wide area Ethernet 4.

The communication device 1 includes a CPU 1 a, a RAM 1 b, a ROM 1 c, aframe transmission control portion 1 d, an ATM interface 1 e, anEthernet interface if, a LAN switch 1 g, an ATM switch 1 h, a DSP(Digital Signal Processor) 1 j, a VCXO (Voltage Controlled XtalOscillator) 1 k, a cell data buffer 1 m, a frame data buffer 1 n, asynchronization state display LED (Light Emitting Diode) 1 p, a buffermonitor portion 1 q, a VPI processing portion 1 r, a shaping processingportion 1 t, a cell extracting portion 1 w, and a CLP conversion portion1 y, as shown in FIG. 2.

The CPU 1 a executes a computer program stored in the RAM 1 b or the ROM1 c so as to perform the entire control of the communication device 1.Namely, a part of functions of the communication device 1 is realized bythe computer program as software.

The ATM interface 1 e is an interface for making connection between thecommunication device 1 and the ATM device 5 physically via a cable or awireless line. The Ethernet interface 1 f is an interface for makingconnection between the communication device 1 and the wide area Ethernet4 physically via a cable or a wireless line. The LAN switch 1 g performsa switching control of frames and a termination process. The ATM switch1 h performs a switching control of ATM cells and the like. Namely, thecommunication device 1 is an ATM device viewed from the ATM device 5 andan Ethernet device viewed from a device within the wide area Ethernet 4.Other structures of the communication device 1 will be described laterone by one.

Next, an example where data are sent from one of the ATM devices 5 tothe other ATM device 5 will be exemplified for describing a structureand a process in each portion of the communication device 1 shown inFIG. 2 with dividing roughly into each function.

Hereinafter, the ATM device 5 on a data transmission side and the ATMdevice 5 on a data reception side are distinguished and referred to as a“first ATM device 51” and a “second ATM device 52”, respectively. Inaddition, the communication device 1 that is connected to the first ATMdevice 51 via the ATM interface 1 e and the communication device 1 thatis connected to the second ATM device 52 via the ATM interface 1 e maybe distinguished and referred to as a “first communication device 11”and a “second communication device 12”, respectively.

[Function About Clock Synchronization]

FIG. 3 shows an example of a structure of the first communication device11 for realizing a function about clock synchronization, FIG. 4 shows anexample of a structure of the second communication device 12 forrealizing a function about clock synchronization, FIG. 5 shows timingsfor selecting a ATM cell 70 and an empty cell 7E, FIGS. 6( a)-6(c) showexamples of formats of a synchronization frame FRS and a data frame FRD,FIG. 7 shows an example of a method for calculating a first average timeAVF at an initial stage, FIG. 8 shows an example of a method forcalculating the first average time AVF after performing the calculationa predetermined number of times, FIG. 9 shows an example of a variationof an accumulated value in a differential counter CT1, FIG. 10 shows anexample of a method for calculating a second average time AVS, FIG. 11shows an example of a variation of an accumulated value in adifferential counter CT2, and FIGS. 12( a)-12(d) show examples of amethod for adjusting phases of clocks.

Here, a function of transferring a data communication clock of the firstATM device 51, which is for sending data from the first ATM device 51 tothe second ATM device 52, to the second ATM device 52 will be described.FIGS. 3 and 4 show structures of the first communication device 11 andthe second communication device 12, respectively, which have strongconnections with this function. FIGS. 14-17 and 19 that will be referredlater also show structures having strong connection with each function.

In the first communication device-11, the ATM switch 1 h shown in FIG. 3receives the ATM cell 70 that was sent to the second ATM device 52 fromthe first ATM device 51. As described below, this ATM cell 70 is sent tothe second ATM device 52 via the wide area Ethernet 4 and the secondcommunication device 12. Namely, the first communication device 11 isalso a device for relaying the ATM cell 70. In addition, the firstcommunication device 11 is connected to the first ATM device 51 via theATM interface 1 e, so it obtains information of the data communicationclock of the first ATM device 51 by communication with the first ATMdevice 51.

The frame transmission control portion 1 d includes a traffic controlportion 131, an ATM cell output portion 132, a selector 133, anencapsulating processing portion 134, a flow control portion 135, anempty cell output portion 136, a cell arrival monitor portion 137, and asynchronization frame output portion 138.

The traffic control portion 131 generates and delivers a traffic controlsignal S1 as shown in FIG. 5, so as to control a period for sending theATM cell 70, i.e., a sending rate. The cell data buffer 1 m accumulatestemporarily the ATM cell 70 received from the first ATM device 51. TheATM cell output portion 132 retrieve the ATM cell 70 accumulated in thecell data buffer 1 m in order of occurrence at the timing when thetraffic control signal S1 is turned on, and it sends the ATM cell 70 tothe encapsulating processing portion 134 via the selector 133.

The encapsulating processing portion 134 encapsulates the ATM cell 70into a frame conforming to the protocol of the wide area Ethernet 4(namely, a frame of IEEE802.3 format or the like). Namely, the ATM cell70 is converted into an Ethernet frame.

The “encapsulating” means generating a frame including the ATM cell 70embedded in a user data portion (USER-DATA) (see FIG. 6( a)).Hereinafter, a frame in which the ATM cell 70 is encapsulated isreferred to as a “data frame FRD”.

The flow control portion 135 controls the Ethernet interface 1 f and theLAN switch 1 g so that a frame such as the data frame FRD is sent to thewide area Ethernet 4.

If no ATM cell 70 to be sent to the encapsulating processing portion 134is accumulated, a state where there is no data frame FRD to be sent tothe second communication device 12 continues until the next ATM cell 70arrives. Then, however, traffic between the first communication device11 and the second communication device 12 in the network becomesunstable, so fluctuations of data communication between thecommunication devices (in particular, fluctuations of transmission ofthe synchronization frame FRS that will be described later) may occur.

Therefore, if no ATM cell 70 is accumulated in the cell data buffer 1 mand there is not ATM cell 70 to be encapsulated, the data frame FRD issent at a constant time period for stabilizing transmission of thesynchronization frame FRS by the following method, for example.

The empty cell output portion 136 sends the empty cell 7E to theselector 133. The cell arrival monitor portion 137 detects whether ornot the ATM cell output portion 132 has sent the ATM cell 70 to theselector 133, so as to detect whether or not the ATM cell 70 has arrivedfrom the first ATM device 51. If the ATM cell 70 is detected, theselector 133 relays the ATM cell 70 sent from the ATM cell outputportion 132 to the encapsulating processing portion 134 as shown in FIG.5. If it is not detected, the empty cell 7E is selected to be relayed tothe encapsulating processing portion 134 instead of the ATM cell 70.

When the empty cell 7E is received, the encapsulating processing portion134 encapsulates the empty cell 7E to generate the data frame FRDinstead of the ATM cell 70. Then, the flow control portion 135 sends thedata frame FRD in which the empty cell 7E is encapsulated to the widearea Ethernet 4. Thus, a function of maintaining traffic constant withinthe network can be realized.

The synchronization frame output portion 138 divides a clock frequencyof the first ATM device 51 into a predetermined value and sendscontinuously the synchronization frame FRS whose destination is thesecond communication device 12 to the flow control portion 135 insynchronization with the divided clock frequency. This synchronizationframe FRS is a control frame for synchronizing with a clock of the firstATM device 51.

The flow control portion 135 sends the synchronization frame FRSreceived from the synchronization frame output portion 138 to the widearea Ethernet 4 in the same way as the case of the data frame FRD.However, in order to maintain a constant timing for sending thesynchronization frame FRS, a higher priority is given to sending thesynchronization frame FRS than sending the data frame FRD. For example,if both the data frame FRD and the synchronization frame FRS arereceived at the same time, the synchronization frame FRS is given ahigher priority than the data frame FRD and is sent to the secondcommunication device 12 first. Note that in this case, it is possible toadjust the entire data frame FRD that is sent to the wide area Ethernet4 by discarding the data frame FRD in which the empty cell 7E isencapsulated.

The synchronization frame FRS also is constituted by the formatsupporting the wide area Ethernet 4 as shown in FIG. 6( a) similarly tothe data frame FRD. In FIG. 6( a), a destination MAC address and asender MAC address are stored in the fields of “D-MAC” and “S-MAC”,respectively. Arbitrary value set by the system (an Ethernet type) isstored in the field of “TYPE”.

In the field of “INFO”, device inherent information within the frame isstored, and in this embodiment, discrimination information is stored,which is information for discriminating whether a type of the frame is asynchronization frame FRS or a data frame FRD by using partial bits ofthe field. In the field of “USER-DATA”, a sequence number indicating anissue order is stored if the frame is a synchronization frame FRS, whilethe ATM cell 70 or the empty cell 7E is stored if it is a data frame FRDas described before. Namely, data indicating the sequence number areencapsulated in the synchronization frame FRS, while the ATM cell 70 orthe empty cell 7E is encapsulated in the data frame FRD. In the field of“FCS”, a value for frame check sequence is stored.

It is possible to use a format except the format shown in FIG. 6( a) asa format of these frames. For example, it is possible to use a format ofa frame having an Ethernet length field for setting a frame length andLLC/SNAP header as shown in FIG. 6( b). It is possible to use a formatwith the Ethernet length and without the LLC/SNAP header as shown inFIG. 6( c).

The synchronization frame FRS and the data frame FRD bound for the widearea Ethernet 4 are sent to the second communication device 12 via arelay device or the like on the wide area Ethernet 4. In this way, thefunction of data communication with the second communication device 12can be realized by encapsulating data into a frame of the Ethernetformat as an interface conversion from the ATM network to the wide areaEthernet 4.

In the second communication device 12, the frame data buffer 1 n shownin FIG. 4 temporarily accumulates frames received from other devices viathe wide area Ethernet 4. The synchronization frame FRS and the dataframe FRD that are received from the first communication device 11 arealso accumulated in the frame data buffer 1 n. In addition, the timewhen the synchronization frame FRS is received is recorded.

The cell extracting portion 1 w extracts the ATM cell 70 from thereceived data frame FRD. Namely, the data frame FRD is converted intothe ATM cell 70. Then, the ATM interface 1 e and the ATM switch 1 hperform a process for sending the extracted ATM cell 70 to the secondATM device 52 in accordance with the clock frequency delivered from theVCXO 1 k. However, if the empty cell 7E is extracted, it is discarded,and the sending process is not performed.

As described before, however, it is necessary to give information of theclock of the first ATM device 51 to the second ATM device 52 in order tosend the ATM cell 70 from the first ATM device 51 to the second ATMdevice 52. Therefore, the DSP 1 j measures the clock frequency of thefirst ATM device 51 (hereinafter, referred to as a “sender clockfrequency FY1”) so as to adjust phases, and it gives the information ofthe clock to the second ATM device 52.

The clock of the first ATM device 51 can be reproduced in accordancewith a time interval of receiving the plural synchronization frames FRSthat are continuously sent from the first communication device 11. Forexample, a reception period of the synchronization frame FRS isdetermined in accordance with the time interval. Then, the sender clockfrequency FY1 can be determined in accordance with a relationship (i.e.,division ratio) between the real clock period of the first ATM device 51and the transmission period of the synchronization frame FRS. Forexample, if the division ratio is 1/10000, the sender clock frequencyFY1 can be determined by multiplying the reception period of thesynchronization frame FRS by 10000.

However, since the synchronization frame FRS is received by way of thewide area Ethernet 4, fluctuations can be generated instantaneously ortemporarily during the reception period. In this case, the sender clockfrequency FY1 may be measured in accordance with irregular data, andthere is a potential of large error in the measurement result.

Therefore, in order to enhance accuracy of the measurement result of thesender clock frequency FY1 with being affected by characteristics of thewide area Ethernet 4 as little as possible, it is preferable toaccumulate a lot of data about the reception period of thesynchronization frame FRS and to measure the sender clock frequency FY1in accordance with the accumulated data on an average basis as describedbelow with reference to FIGS. 7 and 8. Hereinafter, an example of thismeasurement will be described.

The DSP 1 j shown in FIG. 4 includes a VCXO control portion 142, asynchronization frame information accumulation portion 143, a firstaverage calculation portion 144, a VCXO information accumulation portion145, a second average calculation portion 146, a clock characteristicscomparison portion 147, a link break detection portion 148, and a clockphase comparison portion 149. This structure enables a process formeasuring the sender clock frequency FY1 and controlling the VCXO 1 k sothat the clock signal in synchronization with the sender clock frequencyFY1 can be delivered.

The first average calculation portion 144 measures the sender clockfrequency FY1 in accordance with the reception period of thesynchronization frame FRS from the first communication device 11. Inparallel with this, the second average calculation portion 146 measuresa frequency of the clock signal delivered by the VCXO 1 k. The clockcharacteristics comparison portion 147 determines a differential betweenthe measured sender clock frequency FY1 and the clock frequency of theVCXO 1 k. Then, if there is the differential, the VCXO control portion142 controls the VCXO 1 k by adjusting the voltage so that the clockfrequency of the VCXO 1 k becomes identical to the sender clockfrequency FY1.

After starting the relay of the ATM cell 70 from the first ATM device 51to the second ATM device 52, the process is performed in the procedureas shown in FIG. 7 for a while. Every time when receiving a newsynchronization frame FRS (except for a first frame), thesynchronization frame information accumulation portion 143 shown in FIG.4 calculates a difference between the time when the synchronizationframe FRS is received this time and the time when the synchronizationframe FRS was received last time, so as to calculate the time intervalof reception of both the synchronization frames FRS. Then, itaccumulates time interval values a predetermined number (hereinafterreferred to as a “reference number”) (#101 in FIG. 7).

For example, the first communication device 11 sends the synchronizationframe FRS in accordance with the clock frequency of 8 kHz. If thereference number is “512”, the synchronization frame FRS is receivedapproximately every 125 microseconds, so it takes approximately 64milliseconds to accumulate the time interval values of the referencenumber.

The first average calculation portion 144 calculates a total sum valueSUM of the values accumulated this time every time when the timeinterval values of the reference number are accumulated (#102), and itcalculates the first average time AVF in accordance with the total sumvalue SUM and the first average time AVF that was calculated last time.However, there is not the first average time AVF of last time in a firsttime, so the total sum value SUM obtained in Step #102 is regarded asthe first average time AVF of this time (#103).

After a second time until a predetermined number of times pass, thesynchronization frame information accumulation portion 143 erases thetime interval values of the reference number that were accumulated lasttime and accumulates new time interval values of the reference number inaccordance with the reception time of the synchronization frame FRS thatwas received after that successively (#104). The first averagecalculation portion 144 calculates the total sum value SUM of these timeinterval values (#105) and calculates the first average time AVF of thistime (n−th time) by substituting the total sum value SUM and the firstaverage time AVF that was calculated last time ((n−1)th time) into thefollowing equation (1) (#106).The first average time AVF of this time=((total sum value SUM)+(firstaverage time AVF of last time)×(n−1))/n   (1)

Here, a quotient of division in the equation (1) is calculated to apredetermined place, and lower places are rounded off.

After calculation of the first average time AVF is repeated apredetermined number of times (for example, after 32768 times ofcalculation) a process of calculating the first average time AVF isrepeated in a procedure as shown in FIG. 8.

In FIG. 8, the process in Steps #201 and #202 is basically the same asthe case of Steps #104 and #105 shown in FIG. 7. Namely, thesynchronization frame information accumulation portion 143 accumulatesnew time interval values of the reference number (#201). The firstaverage calculation portion 144 calculates the total sum value SUM ofthese time interval values (#202).

The first average calculation portion 144 calculates the first averagetime AVF of this time by substituting the total sum value SUM and thefirst average time AVF calculated last time into the following equation(2) (#203).The first average time AVF of this time=((total sum value SUM)+(firstaverage time AVF of last time)×(m−1))/m   (2)

Here, m in the equation (2) represents a predetermined natural number(for example, 32768).

In the case shown in FIG. 7, a quotient of division in the equation (1)was calculated to a predetermined place, and lower places were roundedoff. However, in the case of FIG. 8, a quotient of division in theequation (2) is calculated to a predetermined place, and the remainderis accumulated in the differential counter CT1 so that accuracy ofcalculation of the first average time AVF is further improved (#204).However, if the first average time AVF of this time is more than orequal to the first average time AVF of last time, the remainder of apositive value is accumulated in the differential counter CT1. If thefirst average time AVF of this time is less than the first average timeAVF of last time, the remainder of a negative value is accumulated inthe differential counter CT1. Namely, it can be said that the remaindermeans a differential under a predetermined place between the firstaverage time AVF of this time and the first average time AVF of lasttime. Since a positive value is accumulated or a negative value isaccumulated in the differential counter CT1, the value of thedifferential counter CT1 increases or decreases as shown in FIG. 9.

Such differentials are accumulated, and the first average time AVFdetermined by the equation (2) is corrected as follows (#205). As shownby a dotted line frame W1 in FIG. 9, if a value of the differentialcounter CT1 becomes more than or equal to a positive threshold level althat is a positive value, the value determined by the equation (2) iscorrected so that the first average time AVF becomes large by adding apredetermined value (a positive value) to the value determined by theequation (2). After the correction, as shown by a dotted line frame W2,the positive threshold level a1 is subtracted from the accumulated valueof the differential counter CT1.

On the other hand, as shown by a dotted line frame W3 in FIG. 9, if avalue of the differential counter CT1 becomes lower than or equal to anegative threshold level a2 that is a negative value, the valuedetermined by the equation (2) is corrected so that the first averagetime AVF becomes small by subtracting a predetermined value (a positivevalue) from the value determined by the equation (2). After thecorrection, as shown by a dotted line frame W4, the negative thresholdlevel a2 is subtracted from the accumulated value of the differentialcounter CT1. Namely, an absolute value of the negative threshold levela2 is added.

The positive threshold level al is “32768”, for example, while thenegative threshold level a2 is “−32768”, for example.

If (negative threshold level a2)<(differential counter CT1)<(positivethreshold level al), the correction is not performed, and the firstaverage time AVF determined by the equation (2) is used as thecalculation result of this time by the first average calculation portion144.

The VCXO information accumulation portion 145 and the second averagecalculation portion 146 shown in FIG. 4 perform the process fordetermining the second average time AVS about the output period of theclock signal of VCXO 1 k for comparing with the latest first averagetime AVF determined by the first average calculation portion 144 in theprocedure as shown in FIG. 10 in parallel with the process by thesynchronization frame information accumulation portion 143 and the firstaverage calculation portion 144.

The VCXO information accumulation portion 145 checks the clock signalproduced by the VCXO 1 k at an interval of a predetermined time (forexample, every four milliseconds) and accumulates a length (time)corresponding to the predetermined period of the clock signal (forexample, a period corresponding to approximately four milliseconds)(#301). Note that when determining the first average time AVF, a lot ofdata are accumulated and used considering fluctuations of thesynchronization frame FRS as described before. However, the clock signalproduced by the VCXO 1 k can be checked directly, so credibility of eachdata is high. Therefore, it is not necessary to accumulate for use somuch data.

When a predetermined number (for example, 64) of values are accumulated,the second average calculation portion 146 determines an average valueof these values, which is regarded as the second average time AVS(#302).

However, the average value is determined to a predetermined place, andthe remainder is accumulated in the differential counter CT2 forcorrecting the second average time AVS in the same manner as the case ofmeasuring the first average time AVF as described with reference to FIG.8 (#303). This remainder is also accumulated in the same manner as thecase of the first average time AVF. Namely, if the second average timeAVS obtained in Step #302 is more than or equal to the second averagetime AVS of last time, it is accumulated as a positive value in thedifferential counter CT2. If the second average time AVS obtained inStep #302 is less than the second average time AVS of last time, it isaccumulated as a negative value in the differential counter CT2.Therefore, it can be said that this remainder means a differential undera predetermined place between the second average time AVS of this timeand the second average time AVS of last time. Since a positive value isaccumulated or a negative value is accumulated in the differentialcounter CT2, the value of the differential counter CT2 increases ordecreases as shown in FIG. 11.

In accordance with a value of the differential counter CT2, the secondaverage time AVS is corrected (#304). If a value of the differentialcounter CT2 becomes more than or equal to a positive threshold level a3(for example, “+4”) that is a positive value, correction is performed sothat the second average time AVS determined in Step #302 becomes largeby adding a predetermined value (a positive value). For example, thecorrection is performed in the case of a dotted line frame W5 shown inFIG. 11. After the correction, as shown by a dotted line frame W6, thepositive threshold level a3 is subtracted from the accumulated value ofthe differential counter CT2.

On the other hand, if a value of the differential counter CT2 becomeslower than or equal to a negative threshold level a4 (for example, “−4”)that is a negative value, the correction is performed so that the secondaverage time AVS becomes small by subtracting a predetermined value (apositive value). For example, the correction is performed in the case ofa dotted line frame W7. After the correction, as shown by a dotted lineframe W8, the negative threshold level a4 is subtracted from theaccumulated value of the differential counter CT2. Namely, the absolutevalue of the negative threshold level a4 is added.

If (negative threshold level a4)<(differential counter CT2)<(positivethreshold level a3), the correction is not performed, and the secondaverage time AVS determined in Step #302 is regarded as the result ofthis time calculated by the second average calculation portion 146.

After the second time, the leading (the oldest) value of the accumulatedvalues is erased, and remaining (as shown in Step #305, for example, 63)values and a newly accumulated value are used for the same process as inSteps #302-#304, so as to determine the second average time AVS (#305and subsequent steps).

The first average time AVF and the second average time AVS determined inthis way indicate characteristics of the clock frequency (the senderclock frequency FY1) of the first ATM device 51 and characteristics ofthe clock frequency of the VCXO 1 k of the second communication device12, respectively. Therefore, the first average time AVF is compared withthe second average time AVS so that a difference between the senderclock frequency FY1 and the clock frequency of the VCXO 1 k of thesecond communication device 12 can be detected.

Note that constants and threshold levels that are used in FIGS. 7, 8 and10, the equation (1), and the equation (2) are set so that thedifferential between the first average time AVF and the second averagetime AVS indicates the difference between the sender clock frequency FY1and the clock frequency of the VCXO 1 k of the second communicationdevice 12.

The clock characteristics comparison portion 147 shown in FIG. 4compares the latest first average time AVF calculated by the firstaverage calculation portion 144 with the latest second average time AVScalculated by the second average calculation portion 146, so as todetermine the difference between them. Then, the VCXO control portion142 controls the VCXO 1 k so that the difference becomes small. Namely,if a value of the second average time AVS is larger than a value of thefirst average time AVF, it can be considered that a clock frequency ofthe VCXO 1 k of the second communication device 12 is higher than asender clock frequency FY1, so the clock frequency of the VCXO 1 k iscontrolled to be lowered. On the contrary, if a value of the secondaverage time AVS is smaller than a value of the first average time AVF,the clock frequency of the VCXO 1 k is controlled to be raised.

The link break detection portion 148 detects occurrence of a failuresuch as an upper network's failure, a physical interface's failure, or adisconnection of a cable (hereinafter, the failure is referred to as a“link break failure”). Then, after detecting that the link break failureis resolved so that the link state is recovered, the processes forsynchronizing the clock frequencies are started again.

When the link break failure occurs, reception of the synchronizationframe FRS from the upper network, i.e., from the first communicationdevice 11 is stopped, so the calculation process of the sender clockfrequency FY1 by the synchronization frame information accumulationportion 143 and the first average calculation portion 144 is stopped.However, the clock delivered by the VCXO 1 k of the second communicationdevice 12 continues to run by itself. However, after the link state isrecovered, if the first average calculation portion 144 restarts thecalculation using the calculation result before stopping, a largedeviation can occur between the real sender clock frequency FY1 and thecalculation result. Then, it may take a long time to adjust the clockfrequency of the VCXO 1 k to the sender clock frequency FY1.

Therefore, when the link break failure is detected, calculation andaccumulation data in the past such as data for calculating the firstaverage time AVF and the second average time AVS accumulated before theoccurrence of the link break failure are cleared and are reset to aninitial value when the second communication device 12 was activated.Then, after the link state is recovered, the calculation process isrestarted from the beginning. Namely, since a clock frequency of thetarget of the reconnection is not known, the calculation andaccumulation data in the past are cleared, and the calculation processis restarted. Thus, a time necessary for resynchronization can beshortened.

The clock phase comparison portion 149 compares a phase of the clockcomponent CW1 reproduced by the synchronization frame FRS received fromthe first communication device 11 with a phase of the clock componentCW2 of the VCXO 1 k so as to determine a deviation between them. Thephase difference is determined from a deviation between edges of boththe clock components CW1 and CW2 (clock edges) as shown in FIGS. 12(a)-12(d), for example. The VCXO control portion 142 controls the VCXO 1k in accordance with the deviation so that the phase difference becomesas small as possible.

If the deviation between a phase of the clock component CW1 and a phaseof the clock component CW2 is less than a threshold level Lp as shown inthe relationship between FIGS. 12( a) and 12(b), the control foradjusting phases is not performed. Here, 0<(threshold level Lp)<1/2period.

If a phase of the clock component CW2 is delayed by threshold level Lpor more from a phase of the clock component CW1 as shown in therelationship between FIGS. 12( a) and 12(c), the VCXO control portion142 controls the clock frequency of the VCXO 1 k to rise instantaneouslyso that the phase difference becomes small. On the other hand, if therelationship is opposite as shown in the relationship between FIGS. 12(a) and 12(d), the VCXO control portion 142 controls the clock frequencyof the VCXO 1 k to drop so that the phase difference becomes small.

The synchronization state display LED 1 p shown in FIG. 4 is lighted toinform the user when it is detected that the deviation between the phaseof the clock component CW1 and the phase of the clock component CW2 ismore than or equal to the threshold level Lp. When a predetermined timehas passed since the deviation becomes less than the threshold level Lpthanks to the control process by the VCXO control portion 142 (namely, apredetermined time has passed since returning to synchronization state),the synchronization state display LED 1 p goes out.

By the process described above, the clock frequency of the VCXO 1 k ofthe second communication device 12 is adjusted to the sender clockfrequency FY1. Then, the second communication device 12 performs thecommunication with the second ATM device 52 via the ATM interface 1 e inaccordance with the clock signal received from the VCXO 1 k, so that theclock information of the first ATM device 51 is sent to the second ATMdevice 52. Thus, the second ATM device 52 can synchronize the clock ofthe own device with the sender clock frequency FY1. As a result, it ispossible to receive the ATM cell 70 sent from the first ATM device 51via the first communication device 11, the wide area Ethernet 4 and thesecond communication device 12.

In addition, when the first communication device 11 sends thesynchronization frame FRS continuously, an aging maintaining function ofthe MAC address can be realized in each relay device on the wide areaEthernet 4.

Namely, the synchronization frame FRS is sent from the firstcommunication device 11 to the wide area Ethernet 4 with a fixed MACaddress and is relayed by the relay devices successively. Then, each ofthe relay devices receives the synchronization frame FRS and every timerefers to the MAC address table for checking the next relay device andresets an expiration limit timer of the MAC address in the MAC addresstable to an original MAX value.

In this way, the synchronization frame FRS is relayed by the relaydevices successively from the first communication device 11 to thesecond communication device 12, so that the MAC address of thesynchronization frame FRS remains without being forgotten from the MACaddress table of the relay devices. Namely, the MAC address can bemaintained without being aged out. Thus, a route of the synchronizationframe FRS can be constant, and the fluctuations of the time interval forreceiving the synchronization frame FRS in the second communicationdevice 12 can be reduced. In addition, the destination MAC address andthe sender MAC address of the Ethernet frame can be set fixedly for eachrelay device, so a unicast communication can be realized between thefirst communication device 11 and the second communication device 12.

[Function for Improving Accuracy of Measurement of Clock Frequency andOther Various Functions]

Next, a function for measuring the sender clock frequency FY1 withhigher accuracy and other various functions will be described in turn.

[Interpolation Function of Data by Sequence Number and Function ofDetecting State of Network]

FIGS. 13( a) and 13(b) show an example of a method for interpolation ofdata frames FRD. As described above, the sequence number that indicatesan issued order in the first communication device 11 is encapsulated inthe synchronization frame FRS. The second communication device 12performs a data interpolation process and a process of detecting a stateof the wide area Ethernet 4 for synchronizing in accordance with thereceived plural synchronization frames FRS.

For example, as shown in FIG. 13( a), it is supposed that a missingsynchronization frame FRS that did not reach the second communicationdevice 12 is found as a result of checking the sequence number of thereceived synchronization frame FRS. However, if the calculation processof the first average time AVF that was described with reference to FIGS.7 and 8 was performed in this state, data such as “Time203” that are notdefined would be used.

Therefore, as shown in FIG. 13( b), an intermediate value of receptiontimes of the synchronization frames FRS of the sequence numbers beforeand after the missing synchronization frame FRS is calculated and isregarded as a reception time of the missing synchronization frame FRS inthe interpolation process. Thus, even if there is a synchronizationframe FRS that did not reach correctly, deterioration of accuracy incalculation of the first average time AVF can be suppressed.

In addition, there is a case where synchronization frame FRS is notreceived in the order of the sequence number or where there is a missingsynchronization frame FRS as described above. In this case, it isconsidered that an abnormal situation is generated in the wide areaEthernet 4. In addition, if a difference between reception times of anytwo neighboring synchronization frames FRS (a time interval) issubstantially far from another difference between reception times ofother two neighboring synchronization frames FRS (a time interval), itis considered that irregular transmission of the synchronization frameFRS has occurred.

Therefore, the second communication device 12 can monitor an abnormalcondition of the wide area Ethernet 4 or a delay in transmission of thesynchronization frame FRS by checking the sequence number and thereception time of the received synchronization frame FRS. Furthermore,in accordance with the monitoring result, the ATM device connectionsystem 3 and the wide area Ethernet 4 can be administrated.

[Priority Transmission Function of Synchronization Frame FRS]

As described above, the first communication device 11 sends the dataframe FRD and the synchronization frame FRS via the wide area Ethernet 4in accordance with a protocol such as IEEE802.3x or the like. Therefore,transmission of the frames can be stopped or a transmission speed can bedecreased by a flow control responding to conditions such as traffic ofthe wide area Ethernet 4, a situation of a relay device or a buffer ofthe second communication device 12. In this case, a frame before thetransmission is accumulated in a buffer of the first communicationdevice 11.

However, transmission of the synchronization frame FRS may also bedelayed as a result, and it may be difficult to adjust the outputfrequency of the VCXO 1 k to the sender clock frequency FY1appropriately in the second communication device 12. Therefore, the flowcontrol portion 135 of the first communication device 11 sets not to usethe flow control for the synchronization frame FRS regardless of theconditions such as the buffer of the second communication device 12, andsends the synchronization frame FRS at a predetermined interval. Thus,the second communication device 12 can perform the synchronization withthe first communication device 11 appropriately.

In addition, it is possible to realize a function of sending thesynchronization frame FRS with a higher priority by using a format of aprotocol such as IEEE802.1Q having a specification of priority controlas the frame format. In this case, the first communication device 11sets the user priority of the synchronization frame FRS so that thesynchronization frame FRS becomes a priority frame. In addition, the LANswitch 1 g (see FIG. 2) of the second communication device 12 is setthat a frame of the highest priority is the synchronization frame FRS.

Thus, a delay of transmission of the synchronization frame FRS in thewide area Ethernet 4 can be reduced, and the synchronization frame FRScan be sent from the first communication device 11 to the secondcommunication device 12 under a stable condition.

[Function of Transmitting Synchronization Frame FRS When Traffic isHeavy]

If traffic of the wide area Ethernet 4 is heavy, the synchronizationframe FRS sent from the first communication device 11 may arrive at thesecond communication device 12 with a delay. Therefore, when the firstcommunication device 11 detects that traffic of the wide area Ethernet 4is heavy, it increases a degree of the division so that the transmissionclock frequency of the synchronization frame FRS is lowered within therange that enables synchronization with the second communication device12. For example, the clock frequency is divided into 8 kHz, 4 kHz, 2kHz, . . . , corresponding to the traffic.

Thus, the second communication device 12 can perform the process forsynchronizing while reducing traffic by decreasing frequency of sendingthe synchronization frame FRS.

[Buffer Control Function of Second Communication Device]

FIG. 14 shows an example of a structure of a second communication device12 for realizing a buffer control function. As described above, in thesecond communication device 12, the synchronization frame FRS and thedata frame FRD sent from the first communication device 11 areaccumulated in the frame data buffer in as shown in FIG. 14. Then, thesynchronization frame FRS is used for synchronization with the firstcommunication device 11, and the ATM cell 70 stored in the data frameFRD is sent to the second ATM device 52 in accordance with a clocksignal delivered from the VCXO 1 k.

However, these frames are sent via the wide area Ethernet 4. Therefore,reception of frames is concentrated so that there is a case where thenumber of reception of frames is larger than the number of transmissionof the ATM cells 70. In this case, the number of frames accumulated inthe frame data buffer 1 n increases, so some frames may be abandonedbecause of overflow of the frame data buffer 1 n.

Therefore, in order to secure sufficient available capacity of the framedata buffer 1 n, a threshold level is set in advance, and the buffermonitor portion 1 q monitors whether or not quantity of data accumulatedin the frame data buffer in has exceeded this threshold level. When thebuffer monitor portion 1 q detects that quantity of the accumulated datahas exceeded this threshold level, the DSP 1 j raises a clock frequencyof the VCXO 1 k temporarily so that the transmission quantity of the ATMcells 70 is increased and quantity of data accumulated in the frame databuffer in is reduced.

Thus, discard of data in the frame data buffer in can be prevented. Whenquantity of data accumulated in the frame data buffer 1 n goes back tothe threshold level or less, the DSP 1 j puts the clock frequency of theVCXO 1 k back to the original state.

[Communication Function of OAM Cell]

FIG. 15 shows an example of a communication function of an OAM cell. Thefirst ATM device 51 and the second ATM device 52 usually send andreceive not only the ATM cell 70 but also OAM (Operation Administrationand Maintenance) cell that is a cell for maintaining and administratingthe network via the ATM network 9. The ATM device connection system 3 inthis embodiment can also send the OAM cell in the same way as the caseof the ATM cell 70 from the first ATM device 51 to the second ATM device52 via the wide area Ethernet 4.

In FIG. 15, when the first communication device 11 receives the OAM cell7M from the first ATM device 51, it encapsulates the OAM cell 7M to aframe conforming to a protocol of the wide area Ethernet 4 in the samemanner as the case of the ATM cell 70. Hereinafter, the frame generatedin this way is referred to as an “OAM frame FRO”. Then, this OAM frameFRO is sent to the second communication device 12 via the wide areaEthernet 4 in the same manner as the case of the data frame FRD or thesynchronization frame FRS.

When the second communication device 12 receives the OAM frame FRO, itdecapsulates the OAM frame FRO in the same manner as the case of thedata frame FRD so that the OAM cell 7M is extracted. Then, it sends theOAM cell 7M to the second ATM device 52 in accordance with a clocksignal delivered from the VCXO 1 k.

In this way, a special cell such as the OAM cell 7M can also be sent andreceived between the first ATM device 51 and the second ATM device 52via the wide area Ethernet 4 by using the ATM device connection system3.

[ATM Shaping Function]

FIG. 16 shows an example of a structure of a second communication device12 for realizing an ATM shaping function. As shown in FIG. 16, the ATMswitch 1 h is provided with a scheduler processing portion 1 h 1, ashaping administrating portion 1 h 2 and the like.

It is desirable to consider influence of the second communication device12 on the second ATM device 52 and other devices on the lower networkand a load thereof when the ATM cell 70 is sent to the second ATM device52. Considering this point, the ATM switch 1 h of this embodimentperforms the shaping of transmission of the ATM cell 70 as follows.

The shaping administrating portion 1 h 2 sets a rate of a shaping value.Namely, a transmission interval of the ATM cell 70 is set, andadministration is performed so that an interval of transmitting cells ismaintained at constant accuracy. Then, the scheduler processing portion1 h 1 sends the ATM cell 70 to the second ATM device 52 responding topermission of sending cells that is performed in accordance with a rateof the shaping value.

[Setting Function of VLAN-TAG Priority Information in Accordance withCLP value]

FIG. 17 shows an example of a structure of a first communication device11 for realizing a setting function of VLAN-TAG priority information inaccordance with a CLP value. The first communication device 11 isprovided with a function for setting priority information in VLAN-TAG ofa frame in an Ethernet in accordance with set information of a CLP (CellLoss Priority) of the ATM cell (hereinafter referred to as a “CLPvalue”).

In general, a priority order for abandoning when congestions or the likeoccurs in the ATM network is set in the CLP of the ATM cell. On theother hand, a priority order for sending (priority information) can beset in the VLAN-TAG of a frame.

When the first communication device 11 encapsulates the ATM cell 70 sentfrom the first ATM device 51 to the data frame FRD, it sets the priorityinformation in accordance with the CLP value of the ATM cell 70 asfollows, for example.

In FIG. 17, a relationship table TL that indicates a relationshipbetween the CLP value and the priority information in which the priorityorder of transmission becomes higher as the priority for abandoning islower is set in the first communication device 11 in advance.

When the ATM cell 70 is received, the CPU 1 a checks the CLP value thatis set in the ATM cell 70 and informs the CLP conversion portion 1 y.The CLP conversion portion 1 y searches a value of the priority order oftransmission corresponding to the informed CLP value from therelationship table TL. The encapsulating processing portion 134 sets thesearched value in the priority information and encapsulates the ATM cell70 in the data frame FRD. Then, the data frame FRD is transmitted to thesecond communication device 12.

In this way, a function of priority control can be realized fordetermining the priority order of the frame of the Ethernet inaccordance with the CLP value of the ATM cell 70.

[Data Communication Function of One to Plural]

FIG. 18 shows an example of a method for sending data from a firstcommunication device 11 to plural second communication devices 12. Ineach of the examples described above, the case is described in which thefirst communication device 11 and the second communication device 12 areconnected one to one. The ATM device connection system 3 can be appliedto the case where they are connected one to plural as shown in FIG. 18.

In this case, the first communication device 11 that is a master sendsthe synchronization frame FRS as a multicast frame to the secondcommunication devices 12 that are slaves. Each of the secondcommunication devices 12 that has received the synchronization frame FRSperforms synchronization of clock with the first communication device 11in accordance with the method described above.

The ATM cell 70 is sent to the second ATM device 52 that is adestination as follows, for example. The second communication device 12that is connected to the second ATM device 52 that is a destination ofthe ATM cell 70 is discriminated, and route information to the secondcommunication device 12 on the wide area Ethernet 4 is obtained. The ATMcell 70 is encapsulated to the data frame FRD. The data frame FRD issent to the wide area Ethernet 4 in accordance with the obtained routeinformation.

In this way, the ATM device connection system 3 can be used also in themulticonnection structure of one to plural, so that data communicationcan be performed between the first ATM device 51 and the second ATMdevice 52 via the wide area Ethernet 4.

[VPI Reassigning Function]

FIG. 19 shows an example of a structure of a communication device 1 forrealizing a VPI reassigning function. In general, a VPI (Virtual PathIdentifier) of the ATM cell 70 is reassigned every time when beingrelayed by the ATM exchange. The communication device 1 of thisembodiment is also provided with a function for reassigning the VPI ofthe ATM cell 70 in the same manner as the conventional ATM exchange.

The VPI processing portion 1 r includes a VPI reassigning portion 171and a VPI table 172 as shown in FIG. 19.

The VPI table 172 is a table in which reassigning information of the VPIis set. When the ATM cell 70 is entered, the CPU 1 a reads a value thatis set in the VPI (VPI value) of the ATM cell 70. The VPI reassigningportion 171 searches the VPI value of a transmission destinationcorresponding to the read VPI value from the VPI table 172. Then, theVPI value of the ATM cell 70 is converted (reassigned) into the searchedVPI value. For example, if the entered VPI value of the ATM cell 70 is“A” and a VPI value of “B” is obtained as a result of searching the VPItable 172, the VPI value of the ATM cell 70 is converted into “B”.

FIG. 20 is a flowchart showing an example of a flow of a general processof the first communication device 11, FIG. 21 is a flowchart showing anexample of a flow of a general process of the second communicationdevice 12, and FIG. 22 is a flowchart showing an example of a flow of aVCXO control process.

Next, flows of processes of the first communication device, 11 and thesecond communication device 12 when relaying data transmission from thefirst ATM device 51 to the second ATM device 52 will be described withreference to the flowcharts.

In FIG. 20, when the first communication device 11 receives the ATM cell70 from the first ATM device 51 (Yes in #11), the ATM cell 70 is sent tothe selector 133 in synchronization with the traffic control signal S1delivered from the traffic control portion 131 (see FIGS. 3 and 5)(#12). Then, the ATM cell 70 is encapsulated to be converted into thedata frame FRD, which is sent to the wide area Ethernet 4 bound for thesecond communication device 12 (#15). However, if there is no ATM cell70 to be sent to the selector 133 (No in #11), the empty cell 7E that issent from the empty cell output portion 136 is selected (#13), and thisis encapsulated to be converted into the data frame FRD (#14).

In parallel with the process in Steps #11 through #15, thesynchronization frame FRS is sent to the wide area Ethernet 4 bound forthe second communication device 12 every predetermined time (forexample, in synchronization with a clock that is obtained by dividingthe sender clock frequency FY1 to a predetermined frequency) (#16).Higher priority for transmission is given to the synchronization frameFRS than the data frame FRD.

During a period that communication with the first ATM device 51 iscontinued, the process in Steps #11 through #16 is repeated (Yes in#17).

In FIG. 21, when the second communication device 12 receives the dataframe FRD or the synchronization frame FRS (#21), these frames areaccumulated in the frame data buffer in (#22). Then, information aboutthe sender clock frequency FY1 is obtained in accordance with the timeinterval of receiving the synchronization frame FRS, and a process forsynchronizing the clock of the VCXO 1 k with the clock measured by thedata frame FRD is performed in accordance with the information (#23).This process is performed in the procedure as shown in FIG. 22, forexample.

Namely, an average time (a first average time AVF) per predeterminedperiod of a clock of the first ATM device 51 is calculated in accordancewith the time interval of receiving the synchronization frame FRS(#401). As a method of calculating the first average time AVF, themethod that was described before with reference to FIGS. 7 and 8 can beused, for example. It can be said that this first average time AVFindicates characteristics of a clock of the first ATM device 51.

In parallel with this, an average time (a second average time AVS) perpredetermined period of a clock of the VCXO 1 k of the secondcommunication device 12 is calculated (#402). As a method of calculatingthe second average time AVS, the method that was described before withreference to FIG. 10 can be used, for example. It can be said that thissecond average time AVS indicates characteristics of a clock of the VCXO1 k of the second communication device 12.

If a value of the first average time AVF is larger than a value of thesecond average time AVS (Yes in #403 and No in #404), the clockfrequency of the VCXO 1 k of the second communication device 12 ishigher than the clock frequency of the first ATM device 51. Therefore,it is controlled so that the clock frequency of the VCXO 1 k becomeslower than the present value (#406).

If a value of the first average time AVF is smaller than a value of thesecond average time AVS (No in #403 and Yes in #404), the clockfrequency of the VCXO 1 k of the second communication device 12 is lowerthan the clock frequency of the first ATM device 51. Therefore, it iscontrolled so that the clock frequency of the VCXO 1 k becomes higherthan the present value (#405).

Note that what degree the clock frequency of the VCXO 1 k should beraised or lowered depends on tracking ability of the clock of the VCXO 1k with the clock of the first ATM device 51. For example, in order toincrease the tracking ability, the clock frequency of the VCXO 1 kshould be raised or lowered largely. In this case, however, a variationof the clock of the VCXO 1 k also increases. Therefore, in order todecrease the variation for securing stability of the clock, the clockfrequency of the VCXO 1 k should be raised or lowered by a small degree.

A process for adjusting a phase of the clock of the VCXO 1 k of thesecond communication device 12 with a phase of the clock that isreproduced by the data frame FRD is performed (#407 through #410).Namely, as described before with reference to FIGS. 12( a)-12(d), if thereproduced clock is advanced than the clock of the VCXO 1 k by thethreshold level Lp or more (Yes in #407 and Yes in #408), it iscontrolled so that the clock frequency of the VCXO 1 k becomes higherthan the present value instantaneously (#409). If the reproduced clockis delayed by the threshold level Lp or more (Yes in #407 and No in#408), it is controlled so that the clock frequency of the VCXO 1 kbecomes lower than the present value instantaneously(#410).

With reference to FIG. 21, the ATM cell 70 is extracted from the dataframe FRD that is received from the first communication device 11 and issent to the second ATM device 52 (#24). In this case, the transmissionis performed in accordance with the clock delivered from the VCXO 1 k,so the information of the reproduced clock of the first ATM device 51 istransferred to the second ATM device 52.

The process in Step #21 through #24 is repeated while data are sent fromthe first ATM device 51 to the second ATM device 52 (Yes in #25).

In this way, the clock information of the first ATM device 51 can begiven to the second ATM device 52, and it is possible to send data fromthe first ATM device 51 to the second ATM device 52 via the wide areaEthernet 4 instead of the conventional ATM network 9.

According to this embodiment, communication between the ATM devices 5can be performed via the wide area Ethernet 4 instead of the ATM network9. Thus, communication cost can be lower than the conventional method.

Although in this embodiment the function of the communication device 1is described as separated functions of the data transmission side thatis the communication device 1 (the first communication device 11)connected to the ATM device 5 (the first ATM device 51) and thereception side that is the communication device 1 (the secondcommunication device 12) connected to the ATM device 5 (the second ATMdevice 52), it is possible that one communication device 1 includes bothfunctions of the first communication device 11 and the secondcommunication device 12. Thus, a bidirectional communication can berealized by plural ATM devices 5 via the wide area Ethernet 4.

Although only the last first average time AVF among the first averagetimes AVF calculated in the past is used in the process for calculatingthe latest first average time AVF shown in FIGS. 7 and 8 for reducing aprocessor's load of process in this embodiment, it is possible to useother first average times AVF before the last first average time AVF forcalculating the latest first average time AVF.

Although the procedure shown in FIGS. 7, 8, 10 and 22 is used as themethod for synchronizing the clock of the VCXO 1 k of the secondcommunication device 12 with the clock of the first ATM device 51 inthis embodiment, it is possible to use other methods. Furthermore, theentire or a part of the structure of the ATM device connection system 3and the communication device 1, the process contents, the process orderand the like can be modified if necessary in accordance with the spiritof the present invention.

Furthermore, this embodiment includes the following invention.

1. A system for supporting communication between ATM devices when dataare sent from the first ATM device to the second ATM device by an ATMcell,

the system comprising a first connection device and a second connectiondevice that can be connected to each other via Ethernet,

the first connection device including

-   -   an ATM cell reception portion for receiving an ATM cell from the        first ATM device via an ATM interface,    -   a first conversion portion for converting the received ATM cell        to a data frame supporting a protocol of the Ethernet,    -   a data frame transmission portion for sending the data frame        converted by the first conversion portion to the second        connection device via the Ethernet, and    -   a control frame transmission portion for sending a control frame        that supports the protocol of the Ethernet to the second        connection device via the Ethernet at a predetermined time        interval in accordance with a transmission side clock frequency        that is a clock frequency for communication of the first ATM        device, and

the second connection device including

-   -   a control frame reception portion for receiving the control        frame from the first connection device,    -   a data frame reception portion for receiving the data frame from        the first connection device,    -   a clock reproducing portion for reproducing a clock having the        same frequency as the transmission side clock frequency in        accordance with the time interval of receiving the control        frame,    -   a clock transfer portion for transferring the reproduced clock        to the second ATM device via an ATM interface,    -   a second conversion portion for converting the received data        frame into the ATM cell, and    -   an ATM cell transmission portion for sending the ATM cell        converted by the second conversion portion to the second ATM        device via the ATM interface.

2. A data transmission method for sending data from a first ATM deviceto a second ATM device by an ATM cell, the method comprising the stepsof:

connecting a first connection device to a second connection device viaEthernet;

in the first connection device,

-   -   receiving an ATM cell from the first ATM device via an ATM        interface,    -   converting the received ATM cell into a data frame that supports        a protocol of the Ethernet,    -   sending the converted data frame to the second connection device        via the Ethernet, and    -   sending a control frame that supports the protocol of the        Ethernet to the second connection device via the Ethernet at a        predetermined time interval in accordance with a transmission        side clock frequency that is a clock frequency for communication        of the first ATM device; and

in the second connection device,

-   -   receiving the control frame from the first connection device,    -   receiving the data frame from the first connection device,    -   reproducing a clock having the same frequency as the        transmission side clock frequency in accordance with the time        interval of receiving the control frame,    -   transferring the reproduced clock to the second ATM device via        an ATM interface,    -   converting the received data frame into an ATM cell, and    -   sending the converted ATM cell to the second ATM device via an        ATM interface.

The present invention can be used preferably in particular in the casewhere existing ATM devices are newly connected to each other or where awide area Ethernet network is provided instead of the existing ATMnetwork for reducing cost such as maintaining cost.

While example embodiments of the present invention have been shown anddescribed, it will be understood that the present invention is notlimited thereto, and that various changes and modifications may be madeby those skilled in the art without departing from the scope of theinvention as set forth in the appended claims and their equivalents.

1. A data transmission support device for sending data from a first ATMdevice to a second ATM device by an ATM cell, the data transmissionsupport device comprising: a data frame reception portion that receivesa data frame that is an Ethernet frame including an ATM cellencapsulated therein from another device via Ethernet, the other devicebeing connected to the first ATM device; a control frame receptionportion that receives a control frame via the Ethernet, the controlframe being sent by the other device at a predetermined time interval inaccordance with a clock frequency of the first ATM device that is aclock frequency for communication of the first ATM device; a clockreproducing portion that reproduces a clock having the same frequency asthe clock frequency of the first ATM device in accordance with the timeinterval of receiving the control frames; a clock transfer portion thattransfers the reproduced clock to the second ATM device via an ATMinterface; a conversion portion that converts the received data frameinto an ATM cell; and an ATM cell transmission portion that sends theATM cell converted by the conversion portion to the second ATM devicevia the ATM interface.
 2. The data transmission support device accordingto claim 1, wherein the clock reproducing portion reproduces a clockhaving the same frequency as the clock frequency of the first ATM devicein accordance with plural time intervals of receiving the controlframes.
 3. The data transmission support device according to claim 2,wherein the control frame has a sequence number assigned in the order oftransmission from the other device, and if there is a control frame thatis not received by the control frame reception portion, the clockreproducing portion interpolates a reception time of the control framethat is not received in accordance with a reception time of a controlframe of the sequence number before the control frame that is notreceived and a reception time of a control frame of the sequence numberafter the control frame that is not received so that a clock having thesame frequency as the clock frequency of the first ATM device isreproduced.
 4. The data transmission support device according to claim1, wherein the clock reproducing portion reproduces a clock having thesame frequency as the clock frequency of the first ATM device inaccordance with data that were used in the past when the clock frequencyof the first ATM device was reproduced.
 5. The data transmission supportdevice according to claim 4, wherein if a reception failure of thecontrol frame is detected, the clock reproducing portion erases datathat were used in the past when the clock frequency of the first ATMdevice was reproduced and restarts reproduction of a clock from thebeginning after the control frame is received again.
 6. The datatransmission support device according to claim 1, further comprising atransmission side clock characteristics measuring portion that measurescharacteristics of a clock for communication of the first ATM device inaccordance with the time interval of receiving the control frames, and areproduced clock measuring portion that measures the characteristics ofthe clock reproduced by the clock reproducing portion, wherein the clockreproducing portion reproduces the clock in accordance with adifferential between the latest characteristics measured by thetransmission side clock characteristics measuring portion and the latestcharacteristics measured by the reproduced clock measuring portion. 7.The data transmission support device according to claim 1, wherein theclock reproducing portion reproduces the clock so that a phasedifference between the clock and a clock to be reproduced by thereceived control frame falls within a predetermined range.
 8. The datatransmission support device according to claim 1, further comprising abuffer that stores temporarily an ATM cell before transmission, whereinif quantity of data stored in the buffer becomes predetermined quantityor more, the clock reproducing portion reproduces temporarily a clockhaving a higher frequency than the clock frequency of the first ATMdevice.
 9. A data transmission support device that sends data from afirst ATM device to a second ATM device by an ATM cell, the datatransmission support device comprising: an ATM cell reception portionthat receives an ATM cell from the first ATM device; a conversionportion that converts the received ATM cell into a data frame thatconforms to a protocol of Ethernet; a data frame transmission portionthat sends the data frame converted by the conversion portion to anotherdevice via the Ethernet, the other device being connected to the secondATM device via an ATM interface; and a control frame transmissionportion that sends a control frame that conforms to the protocol of theEthernet to the other device via the Ethernet at a predetermined timeinterval in accordance with a frequency of a clock for communication ofthe first ATM device for transferring information about the clock to thesecond ATM device.
 10. The data transmission support device according toclaim 9, wherein the control frame transmission portion gives a higherpriority for transmission to the control frame than the data frame. 11.The data transmission support device according to claim 9, wherein thecontrol frame transmission portion adjusts the predetermined timeinterval of sending the control frames in accordance with traffic on theEthernet.
 12. The data transmission support device according to claim 9,wherein the conversion portion generates the data frame having apriority order of transmission assigned in accordance with a CLP valueof the ATM cell received by the ATM cell reception portion.
 13. The datatransmission support device according to claim 9, wherein the data frametransmission portion converts an empty cell into the data frame if thereis no ATM cell to be converted into the data frame.
 14. The datatransmission support device according to claim 13, wherein the dataframe transmission portion stops the transmission of the data frame if atransmission time of the data frame into which the empty cell isconverted is the same as a transmission time of the control frame by thecontrol frame transmission portion.
 15. The data transmission supportdevice according to claim 9, wherein the conversion portion sends thecontrol frame regardless of a state of the other device or a device on alower network.
 16. The data transmission support device according toclaim 9, wherein the data transmission support device is connected to aplurality of second ATM devices via the Ethernet, and the data frametransmission portion sends the control frame to each of the second ATMdevices.
 17. A data transmission method for sending data from a firstATM device to a second ATM device by an ATM cell, the method comprisingthe steps of: receiving a data frame that is an Ethernet frame includingan ATM cell encapsulated therein from another device via Ethernet, theother device being connected to the first ATM device; receiving acontrol frame via the Ethernet, the control frame being sent from theother device at a predetermined time interval in accordance with a clockfrequency of the first ATM device that is a clock frequency forcommunication of the first ATM device; reproducing a clock having thesame frequency as the clock frequency of the first ATM device inaccordance with the time interval of receiving the control frames;transferring the reproduced clock to the second ATM device via an ATMinterface; converting the received data frame to an ATM cell; andsending the converted ATM cell to the second ATM device via the ATMinterface.
 18. A data transmission method for sending data from a firstATM device to a second ATM device by an ATM cell, the method comprisingthe steps of: receiving an ATM cell from the first ATM device;converting the received ATM cell into a data frame that conforms to aprotocol of Ethernet; sending the converted data frame to another devicevia the Ethernet, the other device being connected to the second ATMdevice via an ATM interface; and sending a control frame that conformsto the protocol of the Ethernet to the other device via the Ethernet ata predetermined time interval in accordance with a frequency of a clockfor communication of the first ATM device for transferring informationabout the clock to the second ATM device.